Fetch and execute operation:
OPCODE fetch cycle: The microprocessor uses this cycle to take the OPCODE of an instruction i.e. fetch OPCODE. In this case, the address of memory location where the OPCODE is stored is given by program counter. This is always the first cycle of any instruction cycle. The OPCODE is taken from memory and transferred to instruction register for decoding and execution.
The time required to complete this cycle is 4 or 6 T states.
Operand fetch cycle: In 2 and 3 byte instruction, taking OPCODE, doesn’t complete the instruction fetching; so we require operand fetch cycle. For 2 byte instruction we require two operand fetch cycles. In this cycle the address is given by program counter. But the contents are not transferred to instruction register instead they are stored in temporary registers. The time required to complete the operand fetch cycle is 3 T states.
Memory read cycle: The microprocessor executes these cycles to read data from memory. The address of memory location is give by instruction. In this case, the program counter is not used, instead, instruction will give address or will specify, where the address is present. IO/M=0.
Memory write cycle: The microprocessor executes these cycles to write data to memory. The address to memory is given by instruction IO/M=0.
I/O read cycle: The microprocessor executes these cycles to read data from I/O device instead of memory. The status of IO/ line is HIGH. The address of port is given by instruction.
I/O write cycle: The microprocessor executes these cycles to write or send data from I/O device. The status of IO/M line is HIGH. The address of port is given by instruction.
OPCODE fetch cycle: The microprocessor uses this cycle to take the OPCODE of an instruction i.e. fetch OPCODE. In this case, the address of memory location where the OPCODE is stored is given by program counter. This is always the first cycle of any instruction cycle. The OPCODE is taken from memory and transferred to instruction register for decoding and execution.
The time required to complete this cycle is 4 or 6 T states.
Operand fetch cycle: In 2 and 3 byte instruction, taking OPCODE, doesn’t complete the instruction fetching; so we require operand fetch cycle. For 2 byte instruction we require two operand fetch cycles. In this cycle the address is given by program counter. But the contents are not transferred to instruction register instead they are stored in temporary registers. The time required to complete the operand fetch cycle is 3 T states.
Memory read cycle: The microprocessor executes these cycles to read data from memory. The address of memory location is give by instruction. In this case, the program counter is not used, instead, instruction will give address or will specify, where the address is present. IO/M=0.
Memory write cycle: The microprocessor executes these cycles to write data to memory. The address to memory is given by instruction IO/M=0.
I/O read cycle: The microprocessor executes these cycles to read data from I/O device instead of memory. The status of IO/ line is HIGH. The address of port is given by instruction.
I/O write cycle: The microprocessor executes these cycles to write or send data from I/O device. The status of IO/M line is HIGH. The address of port is given by instruction.
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