Short notes on DMA - DIRECT MEMORY ACCESS

CPU BUS SIGNALS FOR DMA TRANSFER

• The DMA request line is used to request a DMA transfer.
• The bus request (BR) signal is used by the DMA controller to request the CPU to relinquish control of the buses.
• The CPU activates the bus grant (BG) output to inform the external DMA that its buses are in a high-impedance state (so that they can be used in the DMA transfer.)
• The address bus is used to address the DMA controller and memory at given location
• The Device select (DS) and register select (RS) lines are activated by addressing the DMA controller.
• The RD and WR lines are used to specify either a read (RD) or write (WR) operation on the given memory location.
• The DMA acknowledge line is set when the system is ready to initiate data transfer.
• The data bus is used to transfer data between the I/O device and memory.
• When the last word of data in the DMA transfer is transferred, the DMA controller informs the termination of the transfer to the CPU by means of the interrupt line.